| Author Index |
| A | B | C | D | E | F | G | H | I | J | K | L | M |
| N | O | P | Q | R | S | T | U | V | W | X | Y | Z |
| Total Results found: 2 | Displaying 1 - 2 for : "Nalini" |
| Design and implementation of extended PCM interface controller (EPIC) with reduced clock frequency. | |
| Nalini Iyer (B.V.B College of Engineering, Hubli.) | NCC2003 (pp. 558-562) |
| Jagadish Hadimani (B.V.B College of Engineering, Hubli.) | |
| Santoshkumar Chavan (B.V.B College of Engineering, Hubli.) | |
| Area efficient high speed SB/ISB architecture for AES | |
| C. Nalini (BVBCET, Hubli) | NCC2009 (pp. 321-325) |
| P. V. Anandmohan (ECIL, Bangalore) | |
| D. V Poornaiah (ITI, Bangalore) | |
| V. D. kulkarni (CG-Coreel, Bangalore) | |